BIOS POST Codes - Page 3 of 6
| Code | LED Display | Description |
| 40h | Preparing the virtual mode test. Verify from display memory next. | |
| 41h | Returned to POST after verifying from display memory. Preparing the descriptor tables next. | |
| 42h | The descriptor tables have been prepared. Entering virtual mode for the memory test next. | |
| 43h | Entered virtual mode. Enabling interrupts for diagnostics mode next. | |
| 44h | Interrupts are enabled if the diagnostics switch is on. Initializing data to check the memory wraparound at 0:0h next. | |
| 45h | Data has been initialized for the memory wraparound check. Checking for memory wraparound at 0:0h and finding the total system memory size next. | |
| 46h | The memory wraparound test has been done. The memory size calculation has been done. About to write memory test patterns. | |
| 47h | The memory test patterns were written to extended memory. Writing patterns in conventional memory (first 640 KB) next. | |
| 48h | The patterns to be tested were written to conventional memory. Finding the amount of memory below 1 MB next. | |
| 49h | The amount of memory below 1 MB was found and verified. Finding the amount of memory above 1 MB next. | |
| 4Ah | The amount of memory above 1 MB was found and verified. Performing the BIOS ROM data area check test next. | |
| 4Bh | The BIOS ROM data area check is done. Checking the Del key status and clearing the memory below 1 MB for a soft reset next. | |
| 4Ch | The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. | |
| 4Dh | The memory above 1 MB has been cleared via a soft reset. Clearing the memory size next. | |
| 4Eh | The memory test has started. No soft reset was performed. About to display the first 64 KB memory test. | |
| 4Fh | The memory size display has started. This display is updated during the memory test. Running the sequential and random memory test. | |
| 50h | The test of memory below 1 MB completed. Adjusting the memory size for relocation and shadowing next. | |
| 51h | The memory size has been adjusted for memory relocation above 1 MB and shadowing options. The test of memory above 1 MB is next. | |
| 52h | The test of memory above 1 MB has completed. Preparing for real mode next. | |
| 53h | The CPU registers have been saved, including the memory size. Entering real mode next. | |
| 54h | Shutdown was successful and the CPU is in real mode. Restoring the registers saved during preparation for shutdown next. | |
| 55h | The registers have been restored. Disabling the Gate A20 address line next. | |
| 56h | The Gate A20 address line was disabled successfully. Checking the BIOS ROM data area next. | |
| 57h | The BIOS ROM data area check is partially completed. Completing the BIOS ROM data area check next. | |
| 58h | The BIOS ROM data area check has completed. Clearing the OHit DelO message next. | |
| 59h | The "Hit Del" message has been cleared. About to start the DMA and interrupt controller tests. | |
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